********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Aug 18, 2014
*ECN S14-1662, Rev. B
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product data sheet.  Designers should refer to the
*appropriate data sheet of the same number for guaranteed specification
*limits.
.SUBCKT Si2301CDS D G S
M1  3  GX S S PMOS W=500000u L=0.250u 
M2  S  GX S D NMOS W=500000u L=0.416u
RG  G  GX     6
R1  D  3      RTEMP 3E-2
CGS G  S      100E-12
DBD D  S      DBD
************************************************************ 
.MODEL  PMOS         PMOS (LEVEL  = 3        TOX    = 1.7E-8
+ RS     = 4.5E-2          RD     = 0        NSUB   = 1E16   
+ KP     = 1E-5            UO     = 400             
+ VMAX   = 0               XJ     = 5E-7     KAPPA  = 1E-3
+ ETA    = 1E-4            TPG    = -1  
+ IS     = 0               LD     = 0                 
+ CGSO   = 0               CGDO   = 0        CGBO   = 0 
+ TLEV   = 1               BEX    = -1.5     TCV    = 1.7E-3
+ NFS    = 0.8E12          DELTA  = 0.1)
************************************************************* 
.MODEL  NMOS         NMOS (LEVEL  = 3        TOX    = 1.7E-8
+NSUB    = 9E16            IS     = 0        TPG    = -1)   
************************************************************* 
.MODEL DBD D (CJO=80E-12 VJ=0.38 M=0.39
+FC=0.5 TT=1.8e-08 TREF=25 BV=20.5
+RS=3.308e-02 N=2.756 IS=6.178e-05 IK=1000
+EG=8.569e-01 XTI=2.641 TRS=1.602e-07)
************************************************************* 
.MODEL RTEMP R (TC1=7E-3 TC2=5.5E-6)
************************************************************* 
.ENDS
